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to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation ( http://www.renesas.com ) send any inquiries to http://www.renesas.com/inquiry .
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rev.1.00 may 11, 2006 page 1 of 8 rd151ts3312arp, rd151ts3322arp spread spectrum clock for emi solution rej03d0793-0100 rev.1.00 may 11, 2006 description rd151ts3312arp and rd151ts3322arp is a high-performance spread spectrum clock generator. it is suitable for emi solution of electric systems. features ? supports 10 mhz to 20 mhz operations. multiple rate (xin: sscout) = 1: 1 input frequency 10 mhz to 20 mhz ? spread spectrum modulation ; rd151ts3312arp : 1.5%, 0.5% (central spread modulation) rd151ts3322arp : ?3.0%, ?1.0% (down spread modulation) key specifications ? supply voltages: v dd = 3.3 v 0.3 v ? cycle to cycle jitter = 100 ps typ. ? clock output duty cycle = 50 5% ? output slew rate = 0.7 v/ns typ. ? ordering information part name package type package code (previous code) package abbreviation taping abbreviation (quantity) rd151ts3312arph0 rd151ts3322arph0 sop-8 pin (jedec) prsp0008dd-c (fp-8dcv) rp h (2,500 pcs / reel) block diagram synthesizer mode control 1/n osc ssc modulator vdd sscout nc gnd sel xin xout ssn 1/m r = 350 k ? r = 350 k ? r = 1 m ?
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 2 of 8 pin arrangement (top view) 8 vdd 1 7 sel 6 sscou t 5 gnd xin 2 xo ut 3 4 ssn nc pin descriptions pin name no. type description gnd 5 ground gnd pin vdd 8 power power supply pin. nc 3 nc don?t connect any vdd or gnd. sscout 6 output spread spectrum modulated clock output. xin 1 input oscillator input. xout 2 output oscillator output. sel 7 input ssc% mode select pin. lvcmos level input. pull-down by internal resistor (350 k ? ). ssn 4 input ssc on/off select pin. lvcmos level input. pull?down by internal resistor (350 k ? ). ssc function table stb sel rd151ts3312arp(central spread) rd151ts3322arp(down spread) 0 0 1.5%* 1 ?3.0%* 1 0 1 0.5% ?1.0% 1 0 1 1 off off note: 1. 1.5%(ts3312arp) / -3.0%(ts3322arp) ssc is selected for default by internal pull-down resistors. clock frequency table product xin(mhz) sscout(mhz) multiply rate (xin: sscout) rd151ts3312arp 10 to 20 10 to 20 1:1 rd151ts3322arp 10 to 20 10 to 20 1:1
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 3 of 8 absolute maximum ratings item symbol ratings unit conditions supply voltage v dd ?0.5 to 4.6 v input voltage v i ?0.5 to 4.6 v output voltage *1 v o ?0.5 to v dd +0.5 v input clamp current i ik ?50 ma v i < 0 output clamp current i ok ?50 ma v o < 0 continuous output current i o 50 ma v o = 0 to v dd maximum power dissipation 0.7 w ta = 55c (in still air) storage temperature t stg ?65 to +150 c notes: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. 1. the input and output negative volt age ratings may be exceeded if the in put and output clamp current ratings are observed. recommended operating conditions item symbol min typ max unit conditions supply voltage v dd 3.0 3.3 3.6 v dc input signal voltage ?0.3 ? v dd +0.3 v high level input voltage v ih 0.7 v dd ? v dd +0.3 v low level input voltage v il ?0.3 ? 0.3 v dd v input clock duty cycle 45 50 55 % operating temperature t a ?20 ? 85 c dc electrical characteristics ta = ?20 to 85 c, v dd = 3.0 to 3.6 v item symbol min typ max unit test conditions ? ? 20 v i = 0 v or 3.6 v, v dd = 3.6 v, xin pin input current i i ? ? 100 a v i = 0 v or 3.6 v, v dd = 3.6 v, sel, ssn pins input capacitance c i ? 3 ? pf sel, ssn pins dc electrical characterist ics / ssc clock output ta = ?20 to 85 c, v dd = 3.0 to 3.6 v item symbol min typ max unit test conditions v oh v dd ?0.2 ? ? v i oh = ?1 ma output voltage v ol ? ? 200 mv i ol = 1 ma i oh ? ?13 ? v oh = 1.5 v, v dd = 3.3 v output current i ol ? 13 ? ma v ol = 1.5 v, v dd = 3.3 v output impedance ? 40 ? ? note: parameters are target of desi gn. not 100% tested in production.
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 4 of 8 ac electrical characterist ics / ssc clock output ta = 25c, v dd = 3.3 v, c l = 15 pf item symbol min typ max unit test conditions notes operating current i dd ? 12 17 ma v dd = 3.3 v, c l = 15 pf, xin = 20 mhz cycle to cycle jitter * 1 t ccs ? |100| ? ps sel = 0, c l = 0 pf ssc = 1.5% (ts3312arp) ssc = ?3.0% (ts3322arp) figure 1 slew rate t sl ? 0.7 4.0 v/ns v dd = 3.3 v, 0.2 v dd to 0.8 v dd clock duty cycle 45 50 55 % stabilization time *2 ? ? 2 ms notes: parameters are target of des ign. not 100% tested in production. 1. cycle to cycle jitter is included spread spectrum modulation. 2. stabilization time is the time requi red for the integrated circuit to obtain phase lock of its input signal after power up. sscout tcycle n t ccs = (tcycle n) ? (tcycle n+1) tcycle n+1 figure 1 cycle to cycle jitter
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 5 of 8 application information 1. recommended circuit configuration the power supply circuit of the optimal performance on the application of a system should refer to figure 2. vdd decoupling is important to both reduce jitter and emi radiation. the c1 decoupling capacitor should be placed as close to the vdd pin as possible, otherwise the increased trace inductance will negate its decoupling capability. 8 1 7 sscout 6 sel ssn 5 2 3 4 xin xout r1 c1 c2 gnd gnd gnd vdd (crystal or reference input) (crystal or not connection) nc notes: c1 = high frequency supply decoupling capacitor. (0.1 f recommended) c2 = low frequency supply decoupling capacitor. (22 f recommended) r1 = match value to line impedance. figure 2 recommended circuit configuration
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 6 of 8 2. example board layout configuration 1 7 6 5 3 2 4 crystal connection or reference input crystal connection or no connection sscout p g g g 0.1 f 22 f fb vdd (+3.3v supply) g note: via to gnd plane r1 = match value to line impedance. fb = ferrite bead. r1 figure 3 example board layout
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 7 of 8 3. example of ts33xx emi solution ic?s application ts33xxa system bus memory graphics system cont. sscout spread spectrum modulated clock cpu & asic xtal ref. clock xin xout 3.3 v cmos level ref. clock figure 4 ref. clock input example ts33xxa system bus memory graphics system cont. sscout spread spectrum modulated clock cpu & asic xin xout xtal figure 5 xtal ref. clock input example
rd151ts3312arp, rd151ts3322arp rev.1.00 may 11, 2006 page 8 of 8 package dimensions 5 8 4 f * 1 * 2 * 3 p m x y 1 e index mark a d z h e b p terminal cross section ( ni/pd/au plating ) c b 1 1 detail f a l l 0.75 0.10 1.27 5.80 6.20 0.40 0.34 a 1 5.30 max nom min dimension in millimeters symbol reference 1.75 1.27 0.60 0.40 3.95 0.25 0.14 0.10 0.46 0.25 0.20 0.15 6.10 8 0 0.25 1.08 4.90 l 1 z h e y x c b p a 2 e d b 1 c 1 e e l a note) 1. dimensions" * 1 (nom)"and" * 2" do not include mold flash. 2. dimension" * 3"does not include trim offset. p-sop8-3.95x4.9-1.27 0.085g mass[typ.] fp-8dcv prsp0008dd-c renesas code jeita package code previous code
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